[all-commits] [llvm/llvm-project] ff4027: [ARM] Support fp16/bf16 using t constraint

[Sam Elliott via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: ff4027d152d0d928540dbc19a41840a3a59ff23d
      https://github.com/llvm/llvm-project/commit/ff4027d152d0d928540dbc19a41840a3a59ff23d
  Author: Archibald Elliott <archibald.elliott at arm.com>
  Date:   2022-09-28 (Wed, 28 Sep 2022)

  Changed paths:
    M llvm/lib/Target/ARM/ARMISelLowering.cpp
    A llvm/test/CodeGen/ARM/inlineasm-fp-half.ll

  Log Message:
  -----------
  [ARM] Support fp16/bf16 using t constraint

fp16 and bf16 values can be used in GCC's inline assembly using the "t"
constraint, which means "VFP floating-point registers s0-s31" - fp16 and
bf16 values are stored in S registers too.

This change ensures that LLVM is compatible with GCC for programs that
use fp16 and the 't' constraint.

Fixes #57753

Differential Revision: https://reviews.llvm.org/D134553