[all-commits] [llvm/llvm-project] b54c57: [RISCV] Extend strided load/store pattern matching...

[Philip Reames via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: b54c571a01a4d07494d76f13889e47bc0c01ae2d
      https://github.com/llvm/llvm-project/commit/b54c571a01a4d07494d76f13889e47bc0c01ae2d
  Author: Philip Reames <preames at rivosinc.com>
  Date:   2022-09-27 (Tue, 27 Sep 2022)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVGatherScatterLowering.cpp
    M llvm/test/CodeGen/RISCV/rvv/mscatter-combine.ll

  Log Message:
  -----------
  [RISCV] Extend strided load/store pattern matching to non-loop cases

The motivation here is to enable a change I'm exploring in vectorizer to prefer base + offset_vector addressing for scatter/gather. The form the vectorizer would end up emitting would be a gep whose vector operand is an add of the scalar IV (splated) and the index vector. This change makes sure we can recognize that pattern as well as the current code structure. As a side effect, it might improve scatter/gathers from other sources.

Differential Revision: https://reviews.llvm.org/D134755