[all-commits] [llvm/llvm-project] d4bada: [CodeGen] Don't zero callee-save registers with ze...

[Nikita Popov via All-commits]

  Branch: refs/heads/release/15.x
  Home:   https://github.com/llvm/llvm-project
  Commit: d4bada99c069e2edbee2f4c815598476e7508f0b
      https://github.com/llvm/llvm-project/commit/d4bada99c069e2edbee2f4c815598476e7508f0b
  Author: Nikita Popov <npopov at redhat.com>
  Date:   2022-09-19 (Mon, 19 Sep 2022)

  Changed paths:
    M llvm/lib/CodeGen/PrologEpilogInserter.cpp
    M llvm/test/CodeGen/AArch64/zero-call-used-regs.ll
    M llvm/test/CodeGen/X86/zero-call-used-regs.ll

  Log Message:
  -----------
  [CodeGen] Don't zero callee-save registers with zero-call-used-regs (PR57692)

Callee save registers must be preserved, so -fzero-call-used-regs
should not be zeroing them. The previous implementation only did
not zero callee save registers that were saved&restored inside the
function, but we need preserve all of them.

Fixes https://github.com/llvm/llvm-project/issues/57692.

Differential Revision: https://reviews.llvm.org/D133946

(cherry picked from commit b4309800e9dc53a84222a6b57c8615d4a3084988)