[all-commits] [llvm/llvm-project] 7d88a0: [Clang][LoongArch] Implement ABI lowering

[Lu Weining via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 7d88a05cc01c8d8950d88e96fd8516af67b10b8e
      https://github.com/llvm/llvm-project/commit/7d88a05cc01c8d8950d88e96fd8516af67b10b8e
  Author: Weining Lu <luweining at loongson.cn>
  Date:   2022-09-19 (Mon, 19 Sep 2022)

  Changed paths:
    M clang/lib/Basic/Targets/LoongArch.h
    M clang/lib/CodeGen/TargetInfo.cpp
    A clang/test/CodeGen/LoongArch/abi-lp64d.c
    M clang/test/CodeGen/ext-int-cc.c
    A clang/test/CodeGenCXX/LoongArch/abi-lp64d-struct-inherit.cpp

  Log Message:
  -----------
  [Clang][LoongArch] Implement ABI lowering

Reuse most of RISCV's implementation with several exceptions:

1. Assign signext/zeroext attribute to args passed in stack.
On RISCV, integer scalars passed in registers have signext/zeroext
when promoted, but are anyext if passed on the stack. This is defined
in early RISCV ABI specification. But after this change [1], integers
should also be signext/zeroext if passed on the stack. So I think
RISCV's ABI lowering should be updated [2].

While in LoongArch ABI spec, we can see that integer scalars narrower
than GRLEN bits are zero/sign-extended no matter passed in registers
or on the stack.

2. Zero-width bit fields are ignored.
This matches GCC's behavior but it hasn't been documented in ABI sepc.
See https://gcc.gnu.org/r12-8294.

3. `char` is signed by default.
There is another difference worth mentioning is that `char` is signed
by default on LoongArch while it is unsigned on RISCV.

This patch also adds `_BitInt` type support to LoongArch and handle it
in LoongArchABIInfo::classifyArgumentType.

[1] https://github.com/riscv-non-isa/riscv-elf-psabi-doc/commit/cec39a064ee0e5b0129973fffab7e3ad1710498f
[2] https://github.com/llvm/llvm-project/issues/57261

Differential Revision: https://reviews.llvm.org/D132285