[all-commits] [llvm/llvm-project] c6acb4: [SDAG] Add `getCALLSEQ_END` overload taking `uint6...

[Sergei Barannikov via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: c6acb4eb0f29aa651304ccc6221450afcce6702a
      https://github.com/llvm/llvm-project/commit/c6acb4eb0f29aa651304ccc6221450afcce6702a
  Author: Sergei Barannikov <barannikov88 at gmail.com>
  Date:   2022-09-15 (Thu, 15 Sep 2022)

  Changed paths:
    M llvm/include/llvm/CodeGen/SelectionDAG.h
    M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    M llvm/lib/Target/ARC/ARCISelLowering.cpp
    M llvm/lib/Target/ARM/ARMISelLowering.cpp
    M llvm/lib/Target/AVR/AVRISelLowering.cpp
    M llvm/lib/Target/BPF/BPFISelLowering.cpp
    M llvm/lib/Target/CSKY/CSKYISelLowering.cpp
    M llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
    M llvm/lib/Target/Lanai/LanaiISelLowering.cpp
    M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
    M llvm/lib/Target/M68k/M68kISelLowering.cpp
    M llvm/lib/Target/MSP430/MSP430ISelLowering.cpp
    M llvm/lib/Target/Mips/MipsISelLowering.cpp
    M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
    M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/lib/Target/Sparc/SparcISelLowering.cpp
    M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
    M llvm/lib/Target/VE/VEISelLowering.cpp
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/lib/Target/XCore/XCoreISelLowering.cpp

  Log Message:
  -----------
  [SDAG] Add `getCALLSEQ_END` overload taking `uint64_t`s

All in-tree targets pass pointer-sized ConstantSDNodes to the
method. This overload reduced amount of boilerplate code a bit.  This
also makes getCALLSEQ_END consistent with getCALLSEQ_START, which
already takes uint64_ts.