[all-commits] [llvm/llvm-project] 09d73f: [RISCV] Add MIR comments for VecPolicy operands

Philip Reames via All-commits all-commits at lists.llvm.org
Tue Sep 13 15:36:57 PDT 2022


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 09d73fe8cdf58ebac455336d7ff6e231be9e05b0
      https://github.com/llvm/llvm-project/commit/09d73fe8cdf58ebac455336d7ff6e231be9e05b0
  Author: Philip Reames <preames at rivosinc.com>
  Date:   2022-09-13 (Tue, 13 Sep 2022)

  Changed paths:
    M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
    M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
    M llvm/test/CodeGen/RISCV/rvv/commuted-op-indices-regression.mir
    M llvm/test/CodeGen/RISCV/rvv/emergency-slot.mir
    M llvm/test/CodeGen/RISCV/rvv/implicit-def-copy.ll
    M llvm/test/CodeGen/RISCV/rvv/pass-fast-math-flags-sdnode.ll
    M llvm/test/CodeGen/RISCV/rvv/tail-agnostic-impdef-copy.mir
    M llvm/test/CodeGen/RISCV/rvv/vleff-vlseg2ff-output.ll
    M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.mir

  Log Message:
  -----------
  [RISCV] Add MIR comments for VecPolicy operands

Analogous to what we already do for SEW operands, aimed at making the resulting MIR readable by a human.




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