[all-commits] [llvm/llvm-project] 381071: [RegisterInfoEmitter] Generate isConstantPhysReg()...

Alexander Richardson via All-commits all-commits at lists.llvm.org
Wed Aug 24 07:17:58 PDT 2022


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 38107171ed56601773a5ac8d753463fa26542440
      https://github.com/llvm/llvm-project/commit/38107171ed56601773a5ac8d753463fa26542440
  Author: Alex Richardson <alexrichardson at google.com>
  Date:   2022-08-24 (Wed, 24 Aug 2022)

  Changed paths:
    M llvm/include/llvm/Target/Target.td
    M llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
    M llvm/lib/Target/AArch64/AArch64RegisterInfo.h
    M llvm/lib/Target/AArch64/AArch64RegisterInfo.td
    M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
    M llvm/lib/Target/AMDGPU/SIRegisterInfo.h
    M llvm/lib/Target/AMDGPU/SIRegisterInfo.td
    M llvm/lib/Target/LoongArch/LoongArchRegisterInfo.cpp
    M llvm/lib/Target/LoongArch/LoongArchRegisterInfo.h
    M llvm/lib/Target/LoongArch/LoongArchRegisterInfo.td
    M llvm/lib/Target/Mips/MipsRegisterInfo.cpp
    M llvm/lib/Target/Mips/MipsRegisterInfo.h
    M llvm/lib/Target/Mips/MipsRegisterInfo.td
    M llvm/lib/Target/PowerPC/PPCRegisterInfo.td
    M llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
    M llvm/lib/Target/RISCV/RISCVRegisterInfo.h
    M llvm/lib/Target/RISCV/RISCVRegisterInfo.td
    M llvm/lib/Target/VE/VERegisterInfo.cpp
    M llvm/lib/Target/VE/VERegisterInfo.h
    M llvm/lib/Target/VE/VERegisterInfo.td
    M llvm/utils/TableGen/CodeGenRegisters.cpp
    M llvm/utils/TableGen/CodeGenRegisters.h
    M llvm/utils/TableGen/RegisterInfoEmitter.cpp

  Log Message:
  -----------
  [RegisterInfoEmitter] Generate isConstantPhysReg(). NFCI

This commit moves the information on whether a register is constant into
the Tablegen files to allow generating the implementaiton of
isConstantPhysReg(). I've marked isConstantPhysReg() as final in this
generated file to ensure that changes are made to tablegen instead of
overriding this function, but if that turns out to be too restrictive,
we can remove the qualifier.

This should be pretty much NFC, but I did notice that e.g. the AMDGPU
generated file also includes the LO16/HI16 registers now.

The new isConstant flag will also be used by D131958 to ensure that
constant registers are marked as call-preserved.

Differential Revision: https://reviews.llvm.org/D131962


  Commit: 2cdf4225aab6976569127406ed917d4a0d826278
      https://github.com/llvm/llvm-project/commit/2cdf4225aab6976569127406ed917d4a0d826278
  Author: Alex Richardson <alexrichardson at google.com>
  Date:   2022-08-24 (Wed, 24 Aug 2022)

  Changed paths:
    A llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/ve-basic.ll
    A llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/ve-basic.ll.expected
    A llvm/test/tools/UpdateTestChecks/update_llc_test_checks/ve-basic.test

  Log Message:
  -----------
  [update_llc_test_checks][VE] Add baseline test for PIC function regex

While working on https://reviews.llvm.org/D131429, I got a test diff in
one of the VE tests and running update_llc_test_checks.py deleted all the
code for that function. This is a baseline test for this bug (incorrect
regex for VE when .Lfoo$local symbols are used).

Reviewed By: kaz7

Differential Revision: https://reviews.llvm.org/D131434


  Commit: 2616e00949b18f5bd1223cb6054f7ad8ffa7e9c8
      https://github.com/llvm/llvm-project/commit/2616e00949b18f5bd1223cb6054f7ad8ffa7e9c8
  Author: Alex Richardson <alexrichardson at google.com>
  Date:   2022-08-24 (Wed, 24 Aug 2022)

  Changed paths:
    M llvm/test/CodeGen/VE/Scalar/builtin_sjlj_landingpad.ll
    M llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/ve-basic.ll.expected
    M llvm/utils/UpdateTestChecks/asm.py

  Log Message:
  -----------
  [update_llc_test_checks][VE] Handle .Lfoo$local in function regex

While working on https://reviews.llvm.org/D131429, I got a test diff in
one of the VE tests and running update_llc_test_checks.py deleted all the
code for that function. This updates the regex to handle this new output.

Reviewed By: kaz7

Differential Revision: https://reviews.llvm.org/D131431


Compare: https://github.com/llvm/llvm-project/compare/ad8c34bc3089...2616e00949b1


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