[all-commits] [llvm/llvm-project] 07a700: [RISCV] Add zihintntl compressed instructions

Alex Tsao via All-commits all-commits at lists.llvm.org
Tue Aug 23 23:29:24 PDT 2022


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 07a700f814bf3799b865f265d01327d2b3bbc2c4
      https://github.com/llvm/llvm-project/commit/07a700f814bf3799b865f265d01327d2b3bbc2c4
  Author: Alex <814943412 at qq.com>
  Date:   2022-08-24 (Wed, 24 Aug 2022)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVInstrInfoC.td
    M llvm/test/MC/RISCV/attribute-arch.s
    A llvm/test/MC/RISCV/rv32zihintntl-invalid.s
    A llvm/test/MC/RISCV/rv32zihintntlc-invalid.s
    A llvm/test/MC/RISCV/rv32zihintntlc-valid.s

  Log Message:
  -----------
  [RISCV] Add zihintntl compressed instructions

Add zihintntl compressed instructions and some files related to zihintntl.
This patch is base on {D121670}.

Reviewed By: kito-cheng

Differential Revision: https://reviews.llvm.org/D121779




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