[all-commits] [llvm/llvm-project] e78064: [AMDGPU] Unify unreachable intrinsics
Yaxun (Sam) Liu via All-commits
all-commits at lists.llvm.org
Tue Aug 9 07:24:42 PDT 2022
Author: Yaxun (Sam) Liu <yaxun.liu at amd.com>
Date: 2022-08-09 (Tue, 09 Aug 2022)
[AMDGPU] Unify unreachable intrinsics
si-annotate-control-flow does depth first traversal of BB's of
a function to insert amdgcn if intrinsics for conditional
branches so that isel can generate correct instructions later.
si-annotate-control-flow checks whether the successor BB for the 'else'
branch of a conditional branch has been visited. If it has been
visited, si-annotate-control-flow assumes the conditional
branch has been handled and will not try to insert if intrinsic
This assumption is not correct when the IR contains multiple
unreachable BB's. Then 'if' intrinscs are not inserted and incorrect
ISA are generated.
This patch fixes the issue by let amdgpu-unify-divergent-exit-nodes
unify unreachables even if they are uniformly reached. In this way
the IR will not contain multiple exits, and structurizer is able to
structurize the IR containing one unified exit.
Reviewed by: Ruiling Song, Matt Arsenault
Differential Revision: https://reviews.llvm.org/D131181
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