[all-commits] [llvm/llvm-project] d9004d: [PowerPC] mapping hardward loop intrinsics to powe...

[Chen Zheng via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: d9004dfbabc62887f09775297436792077ce4496
      https://github.com/llvm/llvm-project/commit/d9004dfbabc62887f09775297436792077ce4496
  Author: Chen Zheng <czhengsz at cn.ibm.com>
  Date:   2022-08-08 (Mon, 08 Aug 2022)

  Changed paths:
    M llvm/lib/Target/PowerPC/PPCCTRLoops.cpp
    M llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
    M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
    M llvm/lib/Target/PowerPC/PPCInstr64Bit.td
    M llvm/lib/Target/PowerPC/PPCInstrInfo.td
    M llvm/test/CodeGen/PowerPC/ctrloops-pseudo.ll
    M llvm/test/CodeGen/PowerPC/ctrloops32.mir
    M llvm/test/CodeGen/PowerPC/ctrloops64.mir
    M llvm/test/CodeGen/PowerPC/sms-phi.ll

  Log Message:
  -----------
  [PowerPC] mapping hardward loop intrinsics to powerpc pseudo

Map hardware loop intrinsics loop_decrement and set_loop_iteration
to the new PowerPC pseudo instructions, so that the hardware loop
intrinsics will be expanded to normal cmp+branch form or ctrloop
form based on the CTR register usage on MIR level.

Reviewed By: lkail

Differential Revision: https://reviews.llvm.org/D123366