[all-commits] [llvm/llvm-project] ceb6c2: [NFC][LoopVectorize] Explicitly disable tail-foldi...

[david-arm via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: ceb6c23b708d4cae3fbb0a569c5ac14069524a63
      https://github.com/llvm/llvm-project/commit/ceb6c23b708d4cae3fbb0a569c5ac14069524a63
  Author: David Sherwood <david.sherwood at arm.com>
  Date:   2022-07-21 (Thu, 21 Jul 2022)

  Changed paths:
    M clang/test/CodeGen/aarch64-sve-vector-bits-codegen.c
    M llvm/test/Transforms/LoopVectorize/AArch64/gather-do-not-vectorize-addressing.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/i1-reg-usage.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/scalable-call.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/scalable-reduction-inloop-cond.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/scalable-reductions.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/scalable-strict-fadd.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/scalarize-store-with-predication.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-basic-vec.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-cond-inv-loads.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-fneg.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-gather-scatter-cost.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-gather-scatter.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-illegal-type.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-inductions-unusual-types.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-inductions.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-inv-loads.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-inv-store.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-large-strides.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-masked-loadstore.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-runtime-check-size-based-threshold.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-select-cmp.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-strict-fadd-cost.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-vector-reverse-mask4.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-vector-reverse.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-gep.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-phi.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/vector-reverse-mask4.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/vector-reverse.ll

  Log Message:
  -----------
  [NFC][LoopVectorize] Explicitly disable tail-folding on some SVE tests

This patch is in preparation for enabling vectorisation with tail-folding
by default for SVE targets. Once we do that many existing tests will
break that depend upon having normal unpredicated vector loops. For
all such tests I have added the flag:

  -prefer-predicate-over-epilogue=scalar-epilogue

Differential Revision: https://reviews.llvm.org/D129137