[all-commits] [llvm/llvm-project] cd3d7b: [AArch64][SVE] Add DAG-Combine to push bitcasts fr...

[Matthew Devereau via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: cd3d7bf15d3e64ca2572c1711df2b849cada8d3b
      https://github.com/llvm/llvm-project/commit/cd3d7bf15d3e64ca2572c1711df2b849cada8d3b
  Author: Matt Devereau <matthew.devereau at arm.com>
  Date:   2022-07-21 (Thu, 21 Jul 2022)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/test/CodeGen/AArch64/sve-ld1r.ll

  Log Message:
  -----------
  [AArch64][SVE] Add DAG-Combine to push bitcasts from floating point loads after DUPLANE128

This patch lowers
  duplane128(insert_subvector(undef, bitcast(op(128bitsubvec)), 0), 0)
to
  bitcast(duplane128(insert_subvector(undef, op(128bitsubvec), 0), 0)).

This enables floating-point loads to match patterns added in
https://reviews.llvm.org/D130010

Differential Revision: https://reviews.llvm.org/D130013