[all-commits] [llvm/llvm-project] 9ac548: [RISCV] isel (add (and X, 0xFFFFFFFE), Y) as (SH1A...

Craig Topper via All-commits all-commits at lists.llvm.org
Fri Jul 1 23:59:33 PDT 2022


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 9ac548e1181c4d4fea49e312396b5b8c28c316b9
      https://github.com/llvm/llvm-project/commit/9ac548e1181c4d4fea49e312396b5b8c28c316b9
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2022-07-01 (Fri, 01 Jul 2022)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVInstrInfoZb.td
    M llvm/test/CodeGen/RISCV/rv64zba.ll

  Log Message:
  -----------
  [RISCV] isel (add (and X, 0xFFFFFFFE), Y) as (SH1ADD (SRLIW X, 1), Y).

Similar for SH2ADD and SH3ADD.

This is what we get from

int foo(int* x, unsigned y) {
  return x[y >> 1];
}

This allows us to avoid materializing 0xFFFFFFFE into a register.




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