[all-commits] [llvm/llvm-project] 3d37e7: [RISCV] Merge more rv32/rv64 vector intrinsic test...

Craig Topper via All-commits all-commits at lists.llvm.org
Sat Jun 25 13:21:59 PDT 2022


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 3d37e785c77a2461abe43b82bd0ac247244f94f1
      https://github.com/llvm/llvm-project/commit/3d37e785c77a2461abe43b82bd0ac247244f94f1
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2022-06-25 (Sat, 25 Jun 2022)

  Changed paths:
    R llvm/test/CodeGen/RISCV/rvv/vcompress-rv32.ll
    R llvm/test/CodeGen/RISCV/rvv/vcompress-rv64.ll
    A llvm/test/CodeGen/RISCV/rvv/vcompress.ll
    R llvm/test/CodeGen/RISCV/rvv/vle-rv32.ll
    R llvm/test/CodeGen/RISCV/rvv/vle-rv64.ll
    A llvm/test/CodeGen/RISCV/rvv/vle.ll
    R llvm/test/CodeGen/RISCV/rvv/vloxei-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vloxei-rv64.ll
    A llvm/test/CodeGen/RISCV/rvv/vloxei.ll
    R llvm/test/CodeGen/RISCV/rvv/vlse-rv32.ll
    R llvm/test/CodeGen/RISCV/rvv/vlse-rv64.ll
    A llvm/test/CodeGen/RISCV/rvv/vlse.ll
    R llvm/test/CodeGen/RISCV/rvv/vluxei-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vluxei-rv64.ll
    A llvm/test/CodeGen/RISCV/rvv/vluxei.ll
    R llvm/test/CodeGen/RISCV/rvv/vnclip-rv32.ll
    R llvm/test/CodeGen/RISCV/rvv/vnclip-rv64.ll
    A llvm/test/CodeGen/RISCV/rvv/vnclip.ll
    R llvm/test/CodeGen/RISCV/rvv/vnclipu-rv32.ll
    R llvm/test/CodeGen/RISCV/rvv/vnclipu-rv64.ll
    A llvm/test/CodeGen/RISCV/rvv/vnclipu.ll
    R llvm/test/CodeGen/RISCV/rvv/vreductions-int-rv32.ll
    R llvm/test/CodeGen/RISCV/rvv/vreductions-int-rv64.ll
    A llvm/test/CodeGen/RISCV/rvv/vreductions-int.ll
    R llvm/test/CodeGen/RISCV/rvv/vse-rv32.ll
    R llvm/test/CodeGen/RISCV/rvv/vse-rv64.ll
    A llvm/test/CodeGen/RISCV/rvv/vse.ll
    R llvm/test/CodeGen/RISCV/rvv/vsext-rv32.ll
    R llvm/test/CodeGen/RISCV/rvv/vsext-rv64.ll
    A llvm/test/CodeGen/RISCV/rvv/vsext.ll
    R llvm/test/CodeGen/RISCV/rvv/vsoxei-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vsoxei-rv64.ll
    A llvm/test/CodeGen/RISCV/rvv/vsoxei.ll
    R llvm/test/CodeGen/RISCV/rvv/vsse-rv32.ll
    R llvm/test/CodeGen/RISCV/rvv/vsse-rv64.ll
    A llvm/test/CodeGen/RISCV/rvv/vsse.ll
    R llvm/test/CodeGen/RISCV/rvv/vsuxei-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vsuxei-rv64.ll
    A llvm/test/CodeGen/RISCV/rvv/vsuxei.ll
    R llvm/test/CodeGen/RISCV/rvv/vzext-rv32.ll
    R llvm/test/CodeGen/RISCV/rvv/vzext-rv64.ll
    A llvm/test/CodeGen/RISCV/rvv/vzext.ll

  Log Message:
  -----------
  [RISCV] Merge more rv32/rv64 vector intrinsic tests that contain the same content.




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