[all-commits] [llvm/llvm-project] 0cc981: [AArch64] implement isReassocProfitable, disable f...

[Florian Hahn via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 0cc981e021eda2b9c14d41302c5f0409b0a42719
      https://github.com/llvm/llvm-project/commit/0cc981e021eda2b9c14d41302c5f0409b0a42719
  Author: Florian Hahn <flo at fhahn.com>
  Date:   2022-05-23 (Mon, 23 May 2022)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/lib/Target/AArch64/AArch64ISelLowering.h
    M llvm/test/CodeGen/AArch64/arm64-vmul.ll

  Log Message:
  -----------
  [AArch64] implement isReassocProfitable, disable for (u|s)mlal.

Currently reassociating add expressions can lead to failing to select
(u|s)mlal. Implement isReassocProfitable to skip reassociating
expressions that can be lowered to (u|s)mlal.

The same issue exists for the *mlsl variants as well, but the DAG
combiner doesn't use the isReassocProfitable hook before reassociating.
To be fixed in a follow-up commit as this requires DAGCombiner changes
as well.

Reviewed By: dmgreen

Differential Revision: https://reviews.llvm.org/D125895