[all-commits] [llvm/llvm-project] 1bf4bb: [LegalizeTypes][RISCV][WebAssembly] Expand ABS in ...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 1bf4bbc4928338db2fa6dca8ff28160fc1838ac2
      https://github.com/llvm/llvm-project/commit/1bf4bbc4928338db2fa6dca8ff28160fc1838ac2
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2022-03-15 (Tue, 15 Mar 2022)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
    M llvm/test/CodeGen/RISCV/iabs.ll
    M llvm/test/CodeGen/WebAssembly/PR41149.ll

  Log Message:
  -----------
  [LegalizeTypes][RISCV][WebAssembly] Expand ABS in PromoteIntRes_ABS if it will expand to sra+xor+sub later.

If we promote the ABS and then Expand in LegalizeDAG, then both the
sra and the xor will have their inputs sign extended. This generates
extra code on RISCV which lacks an i8 or i16 sign extend instructon.
If we expand during type legalization, then only the sra will get its
input sign extended. RISCV is able to combine this with the sra by
doing a shift left followed by an sra.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D121664