[all-commits] [llvm/llvm-project] ae7c66: [RISCV] Add basic code modeling for fixed length v...

[Yeting Kuo via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: ae7c6647f3ea81fc4447a76d824fea4b93862a4e
      https://github.com/llvm/llvm-project/commit/ae7c6647f3ea81fc4447a76d824fea4b93862a4e
  Author: Yeting Kuo <yeting.kuo at sifive.com>
  Date:   2022-03-14 (Mon, 14 Mar 2022)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
    M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
    A llvm/test/Analysis/CostModel/RISCV/reduce-add.ll
    M llvm/test/Analysis/CostModel/RISCV/reduce-and.ll
    A llvm/test/Analysis/CostModel/RISCV/reduce-fadd.ll
    A llvm/test/Analysis/CostModel/RISCV/reduce-max.ll
    A llvm/test/Analysis/CostModel/RISCV/reduce-min.ll
    M llvm/test/Analysis/CostModel/RISCV/reduce-or.ll
    A llvm/test/Analysis/CostModel/RISCV/reduce-xor.ll

  Log Message:
  -----------
  [RISCV] Add basic code modeling for fixed length vector reduction.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D121447