[all-commits] [llvm/llvm-project] 164885: [RISCV][RVV] Fix vslide1up/down intrinsics overflo...

[Lehua Ding via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 1648852c98077345a32f18b468261ecab77af317
      https://github.com/llvm/llvm-project/commit/1648852c98077345a32f18b468261ecab77af317
  Author: Lehua Ding <lehuading at qq.com>
  Date:   2022-03-13 (Sun, 13 Mar 2022)

  Changed paths:
    M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp
    M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/lib/Target/RISCV/RISCVISelLowering.h
    M llvm/lib/Target/RISCV/RISCVSubtarget.h
    M llvm/test/CodeGen/RISCV/rvv/masked-vslide1down-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/unmasked-tu.ll
    A llvm/test/CodeGen/RISCV/rvv/vslide1down-constant-vl-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vslide1down-rv32.ll
    A llvm/test/CodeGen/RISCV/rvv/vslide1up-constant-vl-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vslide1up-rv32.ll

  Log Message:
  -----------
  [RISCV][RVV] Fix vslide1up/down intrinsics overflow bug for SEW=64 on RV32

Reviewed By: craig.topper, kito-cheng

Differential Revision: https://reviews.llvm.org/D120899