[all-commits] [llvm/llvm-project] fa62c5: [RISCV] Add test cases that show that we're too ag...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: fa62c5326a9d74a52ed0678db470a3d759f1602a
      https://github.com/llvm/llvm-project/commit/fa62c5326a9d74a52ed0678db470a3d759f1602a
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2022-03-11 (Fri, 11 Mar 2022)

  Changed paths:
    M llvm/test/CodeGen/RISCV/rv64zbb-intrinsic.ll
    M llvm/test/CodeGen/RISCV/rv64zbp-intrinsic.ll
    M llvm/test/CodeGen/RISCV/rv64zbp.ll

  Log Message:
  -----------
  [RISCV] Add test cases that show that we're too aggressive about using greviw/gorciw. NFC

We currently type legalize to the W form, but type legalization
doesn't place any requirements on the extended bits. So we are ok
to use GREVI/GORCI for type legalization as long as the control
doesn't cross any bits from the extended bits into the lower bits.

This can allow us to recognize cases where the extended bits end
up being all zeros and we can propagate that information through.

My plan is to move greviw/gorciw formation to isel patterns similar
to slliw.


  Commit: 43f668b98e8d87290fc6bbf5ed13c3ab542e3497
      https://github.com/llvm/llvm-project/commit/43f668b98e8d87290fc6bbf5ed13c3ab542e3497
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2022-03-11 (Fri, 11 Mar 2022)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/lib/Target/RISCV/RISCVInstrInfoZb.td
    M llvm/test/CodeGen/RISCV/rv64zbb-intrinsic.ll
    M llvm/test/CodeGen/RISCV/rv64zbp-intrinsic.ll
    M llvm/test/CodeGen/RISCV/rv64zbp.ll

  Log Message:
  -----------
  [RISCV] Move GORCIW/GREVIW formation to isel patterns.

Type legalize narrow RISCVISD::GREV/GORC with constant to a larger
type without switching to W. Detect sext_inreg+gorci/grevi with a
uimm5 immediate during isel to emit GREVIW/GORCIW.

This allows us to better propagate known bits information through
extended bits after type legalization. It will also simplify a
change I'm considering for BREV8 with Zbkb.

A future patch will add computeKnownBits support for GORC.

A further improvement here would be to use hasAllWUsers and
doPeepholeSExtW like we do for SLLIW, but I don't think we have
the test coverage for that yet.


Compare: https://github.com/llvm/llvm-project/compare/a7b1dccf7a9d...43f668b98e8d