[all-commits] [llvm/llvm-project] 341623: [SDAG] match rotate pattern with extra 'or' operation

[Sanjay Patel via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 341623653d891386b7943445981565ed1dff2a18
      https://github.com/llvm/llvm-project/commit/341623653d891386b7943445981565ed1dff2a18
  Author: Sanjay Patel <spatel at rotateright.com>
  Date:   2022-03-09 (Wed, 09 Mar 2022)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    M llvm/test/CodeGen/AArch64/icmp-shift-opt.ll
    M llvm/test/CodeGen/AArch64/logic-shift.ll
    M llvm/test/CodeGen/ARM/consthoist-icmpimm.ll
    M llvm/test/CodeGen/ARM/icmp-shift-opt.ll
    M llvm/test/CodeGen/X86/rotate_vec.ll

  Log Message:
  -----------
  [SDAG] match rotate pattern with extra 'or' operation

This is another fold generalized from D111530.
We can find a common source for a rotate operation hidden inside an 'or':
https://alive2.llvm.org/ce/z/9pV8hn

Deciding when this is profitable vs. a funnel-shift is tricky, but this
does not show any regressions: if a target has a rotate but it does not
have a funnel-shift, then try to form the rotate here. That is why we
don't have x86 test diffs for the scalar tests that are duplicated from
AArch64 ( 74a65e3834d9487 ) - shld/shrd are available. That also makes it
difficult to show vector diffs - the only case where I found a diff was
on x86 AVX512 or XOP with i64 elements.

There's an additional check for a legal type to avoid a problem seen
with x86-32 where we form a 64-bit rotate but then it gets split
inefficiently. We might avoid that by adding more rotate folds, but
I didn't check to see what is missing on that path.

This gets most of the motivating patterns for AArch64 / ARM that are in
D111530.

We still need a couple of enhancements to setcc pattern matching with
rotate/funnel-shift to get the rest.

Differential Revision: https://reviews.llvm.org/D120933