[all-commits] [llvm/llvm-project] 616586: [AArch64] Add legal types for Streaming SVE

Cullen Rhodes via All-commits all-commits at lists.llvm.org
Thu Mar 3 01:51:49 PST 2022


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 616586794bec6fc6dafa7a74cc1917744d1551de
      https://github.com/llvm/llvm-project/commit/616586794bec6fc6dafa7a74cc1917744d1551de
  Author: Cullen Rhodes <cullen.rhodes at arm.com>
  Date:   2022-03-03 (Thu, 03 Mar 2022)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/test/CodeGen/AArch64/sve-intrinsics-contiguous-prefetches.ll
    M llvm/test/CodeGen/AArch64/sve-intrinsics-conversion.ll
    M llvm/test/CodeGen/AArch64/sve-intrinsics-counting-bits.ll
    M llvm/test/CodeGen/AArch64/sve-intrinsics-counting-elems.ll
    M llvm/test/CodeGen/AArch64/sve-intrinsics-fp-converts.ll
    M llvm/test/CodeGen/AArch64/sve-intrinsics-ldN-reg+imm-addr-mode.ll
    M llvm/test/CodeGen/AArch64/sve-intrinsics-ldN-reg+reg-addr-mode.ll
    M llvm/test/CodeGen/AArch64/sve-intrinsics-ldN-sret-reg+imm-addr-mode.ll
    M llvm/test/CodeGen/AArch64/sve-intrinsics-ldN-sret-reg+reg-addr-mode.ll
    M llvm/test/CodeGen/AArch64/sve-intrinsics-logical.ll
    M llvm/test/CodeGen/AArch64/sve-intrinsics-pred-creation.ll
    M llvm/test/CodeGen/AArch64/sve-intrinsics-pred-testing.ll
    M llvm/test/CodeGen/AArch64/sve-intrinsics-reinterpret.ll
    M llvm/test/CodeGen/AArch64/sve-intrinsics-reversal.ll
    M llvm/test/CodeGen/AArch64/sve-intrinsics-sel.ll
    M llvm/test/CodeGen/AArch64/sve-intrinsics-sqdec.ll
    M llvm/test/CodeGen/AArch64/sve-intrinsics-sqinc.ll
    M llvm/test/CodeGen/AArch64/sve-intrinsics-st1-addressing-mode-reg-imm.ll
    M llvm/test/CodeGen/AArch64/sve-intrinsics-st1-addressing-mode-reg-reg.ll
    M llvm/test/CodeGen/AArch64/sve-intrinsics-st1.ll
    M llvm/test/CodeGen/AArch64/sve-intrinsics-stN-reg-imm-addr-mode.ll
    M llvm/test/CodeGen/AArch64/sve-intrinsics-stN-reg-reg-addr-mode.ll
    M llvm/test/CodeGen/AArch64/sve-intrinsics-stores.ll
    M llvm/test/CodeGen/AArch64/sve-intrinsics-uqdec.ll
    M llvm/test/CodeGen/AArch64/sve-intrinsics-uqinc.ll
    M llvm/test/CodeGen/AArch64/sve-intrinsics-while.ll
    M llvm/test/CodeGen/AArch64/sve2-intrinsics-binary-narrowing-add-sub.ll
    M llvm/test/CodeGen/AArch64/sve2-intrinsics-binary-narrowing-shr.ll
    M llvm/test/CodeGen/AArch64/sve2-intrinsics-complex-dot.ll
    M llvm/test/CodeGen/AArch64/sve2-intrinsics-contiguous-conflict-detection.ll
    M llvm/test/CodeGen/AArch64/sve2-intrinsics-fp-converts.ll
    M llvm/test/CodeGen/AArch64/sve2-intrinsics-fp-int-binary-logarithm.ll
    M llvm/test/CodeGen/AArch64/sve2-intrinsics-fp-widening-mul-acc.ll
    M llvm/test/CodeGen/AArch64/sve2-intrinsics-int-mul-lane.ll
    M llvm/test/CodeGen/AArch64/sve2-intrinsics-non-widening-pairwise-arith.ll
    M llvm/test/CodeGen/AArch64/sve2-intrinsics-polynomial-arithmetic.ll
    M llvm/test/CodeGen/AArch64/sve2-intrinsics-unary-narrowing.ll
    M llvm/test/CodeGen/AArch64/sve2-intrinsics-uniform-complex-arith.ll
    M llvm/test/CodeGen/AArch64/sve2-intrinsics-while.ll
    M llvm/test/CodeGen/AArch64/sve2-intrinsics-widening-complex-int-arith.ll
    M llvm/test/CodeGen/AArch64/sve2-intrinsics-widening-dsp.ll
    M llvm/test/CodeGen/AArch64/sve2-intrinsics-widening-pairwise-arith.ll

  Log Message:
  -----------
  [AArch64] Add legal types for Streaming SVE

The compiler currently crashes for scalable types when compiling with
+sme, e.g.

  define <vscale x 4 x i32> @foo(<vscale x 4 x i32> %a) {
    ret <vscale x 4 x i32> %a
  }

since it doesn't know how to legalize the types. SME implies a subset of
SVE (+streaming-sve), the hasSVE predication in the backend needs
extending to consider types/operations that are legal in Streaming SVE.

This is the first patch adding legal types <-> register classes. Before
making the change +sve(2) was temporarily replaced with +sme in all the
intrinsics tests to see what failed, and again after making the change.
For all the tests that passed after adding the legal types another RUN
line has been added for +streaming-sve. More patches to follow.

Reviewed By: sdesmalen

Differential Revision: https://reviews.llvm.org/D118561


  Commit: e4fa8291a277fb3eb84a1ee54b4cc7f7434c7f00
      https://github.com/llvm/llvm-project/commit/e4fa8291a277fb3eb84a1ee54b4cc7f7434c7f00
  Author: Cullen Rhodes <cullen.rhodes at arm.com>
  Date:   2022-03-03 (Thu, 03 Mar 2022)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
    M llvm/test/CodeGen/AArch64/sve-intrinsics-create-tuple.ll
    M llvm/test/CodeGen/AArch64/sve-intrinsics-insert-extract-tuple.ll
    M llvm/test/CodeGen/AArch64/sve-intrinsics-pred-operations.ll

  Log Message:
  -----------
  [AArch64] Allow copying of SVE registers in Streaming SVE

Reviewed By: sdesmalen

Differential Revision: https://reviews.llvm.org/D118562


Compare: https://github.com/llvm/llvm-project/compare/ba6c71b1377e...e4fa8291a277


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