[all-commits] [llvm/llvm-project] b20e80: [RISCV] DAG Combine vcpop and vfirst with VL=0 to ...

[ZCBing via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: b20e80aa590de1f006c2893ee53c9a89714ff276
      https://github.com/llvm/llvm-project/commit/b20e80aa590de1f006c2893ee53c9a89714ff276
  Author: Chenbing Zheng <Chenbing.Zheng at streamcomputing.com>
  Date:   2022-02-25 (Fri, 25 Feb 2022)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/test/CodeGen/RISCV/rvv/vcpop.ll
    M llvm/test/CodeGen/RISCV/rvv/vfirst.ll

  Log Message:
  -----------
  [RISCV] DAG Combine vcpop and vfirst with VL=0 to li imm

vcpop and vfirst are still useful when VL=0.
vcpop equivalents to li 0 and vfirst equivalents to li -1,
since no mask elements are active.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D120302