[all-commits] [llvm/llvm-project] 4e115b: [RISCV] Update computeTargetABI from llc as well a...

[Zakk Chen via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 4e115b7d881136947c083e12f62010bc6b1d3f00
      https://github.com/llvm/llvm-project/commit/4e115b7d881136947c083e12f62010bc6b1d3f00
  Author: Zakk Chen <zakk.chen at sifive.com>
  Date:   2022-02-24 (Thu, 24 Feb 2022)

  Changed paths:
    M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp
    M llvm/test/CodeGen/RISCV/callee-saved-fpr64s.ll
    M llvm/test/CodeGen/RISCV/double-bitmanip-dagcombines.ll
    M llvm/test/CodeGen/RISCV/double-calling-conv.ll
    M llvm/test/CodeGen/RISCV/double-previous-failure.ll
    M llvm/test/CodeGen/RISCV/double-stack-spill-restore.ll
    M llvm/test/CodeGen/RISCV/fastcc-float.ll
    M llvm/test/CodeGen/RISCV/float-bit-preserving-dagcombines.ll
    M llvm/test/CodeGen/RISCV/inline-asm-clobbers.ll
    M llvm/test/CodeGen/RISCV/inline-asm-d-constraint-f.ll
    M llvm/test/CodeGen/RISCV/inline-asm-f-constraint-f.ll
    M llvm/test/CodeGen/RISCV/mattr-invalid-combination.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-emergency-slot.mir
    M llvm/test/CodeGen/RISCV/rvv/large-rvv-stack-size.mir
    M llvm/test/CodeGen/RISCV/select-const.ll
    M llvm/test/CodeGen/RISCV/select-optimize-multiple.ll
    M llvm/test/CodeGen/RISCV/spill-fpr-scalar.ll
    M llvm/test/MC/RISCV/mattr-invalid-combination.s

  Log Message:
  -----------
  [RISCV] Update computeTargetABI from llc as well as clang

Clang computes the default ABI if -mabi is empty
and encode it in LLVM IR module flag since D105555.
For correctness, llc need to give the same target-abi
(Options.MCOptions.ABIName) with ABI encoded in IR.
The getSubtargetImpl already has a check for them only if
Options.MCOptions.ABIName is not empty.

In order to get more robustness we could have a check for
explicit ABI, but now we have two different logic to
compute the default ABI.

The front-end ABI is defautl to the ilp32/ilp32e/lp64, and
ilp32d/lp64d when hardware support for extension D.
The backend ABI is default to the ilp32/ilp32e/lp64.

Reviewed by: asb, jrtc27

Differential Revision: https://reviews.llvm.org/D118333