[all-commits] [llvm/llvm-project] d4342e: [AArch64] Add instruction selection for strict FP

[john-brawn-arm via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: d4342efb69598f7e789a47cffc8827c54c115f31
      https://github.com/llvm/llvm-project/commit/d4342efb69598f7e789a47cffc8827c54c115f31
  Author: John Brawn <john.brawn at arm.com>
  Date:   2022-02-17 (Thu, 17 Feb 2022)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/lib/Target/AArch64/AArch64InstrFormats.td
    M llvm/lib/Target/AArch64/AArch64InstrInfo.td
    M llvm/test/CodeGen/AArch64/arm64-fmadd.ll
    M llvm/test/CodeGen/AArch64/fp-intrinsics.ll

  Log Message:
  -----------
  [AArch64] Add instruction selection for strict FP

This consists of marking the various strict opcodes as legal, and
adjusting instruction selection patterns so that 'op' is 'any_op'.

FP16 and vector instructions additionally require some extra work in
lowering and legalization, so we can't set IsStrictFPEnabled just yet.
Also more work needs to be done for full strict fp support (marking
instructions that can raise exceptions as such, and modelling FPCR use
for controlling rounding).

Differential Revision: https://reviews.llvm.org/D114946


  Commit: 9d68ed08178d590e294761bde2ef471fbf3fe14d
      https://github.com/llvm/llvm-project/commit/9d68ed08178d590e294761bde2ef471fbf3fe14d
  Author: John Brawn <john.brawn at arm.com>
  Date:   2022-02-17 (Thu, 17 Feb 2022)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64InstrInfo.td
    M llvm/test/CodeGen/AArch64/cvt-fp-int-fp.ll

  Log Message:
  -----------
  [AArch64] Allow strict opcodes in fp->int->fp patterns

These patterns don't change the fundamental instructions that are
used, just the variants that are used in order to remove some extra
MOVs.

Differential Revision: https://reviews.llvm.org/D118485


  Commit: b670da798d352c2edcee1d5ad832905b3923c8f3
      https://github.com/llvm/llvm-project/commit/b670da798d352c2edcee1d5ad832905b3923c8f3
  Author: John Brawn <john.brawn at arm.com>
  Date:   2022-02-17 (Thu, 17 Feb 2022)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64InstrInfo.td
    M llvm/test/CodeGen/AArch64/arm64-vmul.ll
    M llvm/test/CodeGen/AArch64/neon-scalar-by-elem-fma.ll

  Log Message:
  -----------
  [AArch64] Allow strict opcodes in indexed fmul and fma patterns

Using an indexed version instead of a non-indexed version doesn't
change anything with regards to exceptions or rounding.

Differential Revision: https://reviews.llvm.org/D118487


  Commit: d916856bee1165aa78ca342cdd43523c33333736
      https://github.com/llvm/llvm-project/commit/d916856bee1165aa78ca342cdd43523c33333736
  Author: John Brawn <john.brawn at arm.com>
  Date:   2022-02-17 (Thu, 17 Feb 2022)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/lib/Target/AArch64/AArch64InstrInfo.td
    M llvm/test/CodeGen/AArch64/faddp.ll

  Log Message:
  -----------
  [AArch64] Allow strict opcodes in faddp patterns

This also requires adjustment to code in AArch64ISelLowering so that
vector_extract is distributed over strict_fadd.

Differential Revision: https://reviews.llvm.org/D118489


Compare: https://github.com/llvm/llvm-project/compare/48e0e6cedc56...d916856bee11