[all-commits] [llvm/llvm-project] 906ebd: [AMDGPU][GlobalISel] Regenerate checks in inst-sel...
Jay Foad via All-commits
all-commits at lists.llvm.org
Mon Jan 24 02:27:29 PST 2022
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: 906ebd5830e6053b50c52bf098e3586b567e8499
https://github.com/llvm/llvm-project/commit/906ebd5830e6053b50c52bf098e3586b567e8499
Author: Jay Foad <jay.foad at amd.com>
Date: 2022-01-24 (Mon, 24 Jan 2022)
Changed paths:
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-anyext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-sext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-zext.mir
Log Message:
-----------
[AMDGPU][GlobalISel] Regenerate checks in inst-select-*ext.mir
Commit: aa50b93e7cf926dec5dd69920e6f48906ea8ad25
https://github.com/llvm/llvm-project/commit/aa50b93e7cf926dec5dd69920e6f48906ea8ad25
Author: Jay Foad <jay.foad at amd.com>
Date: 2022-01-24 (Mon, 24 Jan 2022)
Changed paths:
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-anyext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-sext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-zext.mir
Log Message:
-----------
[AMDGPU][GlobalISel] Add more sign/zero/any-extension tests
Add s1 to s16 cases, and for sgprs s1 to s64 and s32 to s64.
Compare: https://github.com/llvm/llvm-project/compare/a08447d0de5d...aa50b93e7cf9
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