[all-commits] [llvm/llvm-project] d8b690: [AMDGPU] Set MemoryVT for truncstores in tblgen.

[Abinav Puthan Purayil via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: d8b690409daecaadb58a13947ce04cdde0547c4e
      https://github.com/llvm/llvm-project/commit/d8b690409daecaadb58a13947ce04cdde0547c4e
  Author: Abinav Puthan Purayil <abinav.puthanpurayil at amd.com>
  Date:   2022-01-20 (Thu, 20 Jan 2022)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUInstructions.td
    M llvm/test/CodeGen/AMDGPU/GlobalISel/load-unaligned.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/widen-i8-i16-scalar-loads.ll
    M llvm/test/CodeGen/AMDGPU/ds-alignment.ll

  Log Message:
  -----------
  [AMDGPU] Set MemoryVT for truncstores in tblgen.

GlobalISelEmitter was skipping these patterns when its predicates were
checked. This patch should allow us to select d16_hi stores in
GlobalISel.

Differential Revision: https://reviews.llvm.org/D117762