[all-commits] [llvm/llvm-project] c680fb: [AMDGPU] Fixes in ISelDAG path and GlobalISel path...

Ravi Korsa via All-commits all-commits at lists.llvm.org
Fri Dec 17 02:43:53 PST 2021


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: c680fb69d6ae12cae13e96fb3e30ffc8de8cd795
      https://github.com/llvm/llvm-project/commit/c680fb69d6ae12cae13e96fb3e30ffc8de8cd795
  Author: rkorsa <ravi.korsa at gmail.com>
  Date:   2021-12-17 (Fri, 17 Dec 2021)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.sample.a16.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.gather4.a16.dim.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.gather4.a16.dim.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.a16.dim.ll

  Log Message:
  -----------
  [AMDGPU] Fixes in ISelDAG path and GlobalISel path for 'bias' operand with A16 bit on

The LOD bias operand is of type 'half' when the A16-bit is ON' for MIMG instructions.
'bias' is only 16-bit but occupies 32-bits with upper 16-bits containing junk.
The patch fixes both the paths(ISelDAG and GlobalISel) for proper encoding of LOD bias operand.

Differential Revision: https://reviews.llvm.org/D111754




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