[all-commits] [llvm/llvm-project] f50c6c: [PowerPC] Fix 32bit vector insert instructions for...

[Lei Huang via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: f50c6c17185c5513b63ee94d64b2243e3d1b1726
      https://github.com/llvm/llvm-project/commit/f50c6c17185c5513b63ee94d64b2243e3d1b1726
  Author: Lei Huang <lei at ca.ibm.com>
  Date:   2021-11-15 (Mon, 15 Nov 2021)

  Changed paths:
    M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
    M llvm/lib/Target/PowerPC/PPCInstrPrefix.td
    M llvm/test/CodeGen/PowerPC/aix-vec_insert_elt.ll
    M llvm/test/CodeGen/PowerPC/vec_insert_elt.ll

  Log Message:
  -----------
  [PowerPC] Fix 32bit vector insert instructions for ISA3.1

The platform independent ISD::INSERT_VECTOR_ELT take a element index,
but vins* instructions take a byte index. Update 32bit td patterns for
vector insert to handle the element index accordingly.

Since vector insert for non constant index are supported in
ISA3.1, there is no need to use platform specific ISD node,
PPCISD::VECINSERT.  Update td pattern to directly use
ISD::INSERT_VECTOR_ELT instead.

Reviewed By: nemanjai, #powerpc

Differential Revision: https://reviews.llvm.org/D113802