[all-commits] [llvm/llvm-project] 86972f: [AArch64][SVE] Use TargetFrameIndex in more SVE lo...

[Bradley Smith via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 86972f111497bd15df8da181d0d7ac68b866320b
      https://github.com/llvm/llvm-project/commit/86972f111497bd15df8da181d0d7ac68b866320b
  Author: Bradley Smith <bradley.smith at arm.com>
  Date:   2021-10-29 (Fri, 29 Oct 2021)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
    M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
    M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
    M llvm/test/CodeGen/AArch64/named-vector-shuffles-sve.ll
    M llvm/test/CodeGen/AArch64/sve-calling-convention-mixed.ll
    M llvm/test/CodeGen/AArch64/sve-fixed-length-fp-vselect.ll
    M llvm/test/CodeGen/AArch64/sve-fixed-length-int-vselect.ll
    M llvm/test/CodeGen/AArch64/sve-fixed-length-vector-shuffle.ll
    M llvm/test/CodeGen/AArch64/sve-insert-element.ll
    M llvm/test/CodeGen/AArch64/sve-insert-vector.ll
    A llvm/test/CodeGen/AArch64/sve-ldnf1.mir
    A llvm/test/CodeGen/AArch64/sve-ldstnt1.mir
    M llvm/test/CodeGen/AArch64/sve-split-extract-elt.ll
    M llvm/test/CodeGen/AArch64/sve-split-insert-elt.ll

  Log Message:
  -----------
  [AArch64][SVE] Use TargetFrameIndex in more SVE load/store addressing modes

Add support for generating TargetFrameIndex in complex patterns for
indexed addressing modes in SVE. Additionally, add missing load/stores
to getMemOpInfo and getLoadStoreImmIdx.

Differential Revision: https://reviews.llvm.org/D112617