[all-commits] [llvm/llvm-project] 498c72: [X86][SLM] +1uop for PSHUFBrm xmm
Simon Pilgrim via All-commits
all-commits at lists.llvm.org
Sun Oct 17 10:53:32 PDT 2021
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: 498c7236bc763cdee7e7a26e4e411b05b32735c5
https://github.com/llvm/llvm-project/commit/498c7236bc763cdee7e7a26e4e411b05b32735c5
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2021-10-17 (Sun, 17 Oct 2021)
Changed paths:
M llvm/lib/Target/X86/X86ScheduleSLM.td
M llvm/test/tools/llvm-mca/X86/SLM/resources-ssse3.s
Log Message:
-----------
[X86][SLM] +1uop for PSHUFBrm xmm
Extra 1uop for folded pshufb ops, based off a recent llvm-exegesis capture and what Intel AoM / Agner reports as well.
Commit: 680afaaa5d922781f3ec379328853398890d403c
https://github.com/llvm/llvm-project/commit/680afaaa5d922781f3ec379328853398890d403c
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2021-10-17 (Sun, 17 Oct 2021)
Changed paths:
M llvm/lib/Target/X86/X86ScheduleSLM.td
M llvm/test/tools/llvm-mca/X86/SLM/resources-pclmul.s
Log Message:
-----------
[X86][SLM] Fix uops for PCLMULQDQ
Based off a recent llvm-exegesis capture and what Intel AoM / Agner reports as well.
Commit: 5ed5df480257d24f480f01d784ed7cfd6dd25858
https://github.com/llvm/llvm-project/commit/5ed5df480257d24f480f01d784ed7cfd6dd25858
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2021-10-17 (Sun, 17 Oct 2021)
Changed paths:
M llvm/lib/Target/X86/X86ScheduleSLM.td
M llvm/test/tools/llvm-mca/X86/SLM/resources-sse42.s
Log Message:
-----------
[X86][SLM] Fix uops for PCMPISTR/PCMPISTR instructions
Based off a recent llvm-exegesis capture and what Intel AoM / Agner reports as well.
Commit: 0bb32b1b2121ed9fb07e8e2af8333a58e0a487a3
https://github.com/llvm/llvm-project/commit/0bb32b1b2121ed9fb07e8e2af8333a58e0a487a3
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2021-10-17 (Sun, 17 Oct 2021)
Changed paths:
M llvm/lib/Target/X86/X86ScheduleSLM.td
M llvm/test/tools/llvm-mca/X86/SLM/resources-x86_64.s
Log Message:
-----------
[X86][SLM] Fix BitTest+Set uops + port usage
Both ports are required for BitTest ops. Update the uops counts + port usage based off the most recent llvm-exegesis captures and what Intel AoM / Agner reports as well.
Commit: dbf5dc89306964bb613463cbec1637c6f720fbed
https://github.com/llvm/llvm-project/commit/dbf5dc89306964bb613463cbec1637c6f720fbed
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2021-10-17 (Sun, 17 Oct 2021)
Changed paths:
M llvm/test/Analysis/CostModel/X86/div.ll
M llvm/test/Analysis/CostModel/X86/rem.ll
Log Message:
-----------
[CostModel][X86] Add div/rem by negative power-of-2 constants
We have backend optimizations for these (like we do for power-of-2 divisions), but currently the costmodel doesn't match them
Compare: https://github.com/llvm/llvm-project/compare/274b2439f839...dbf5dc893069
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