[all-commits] [llvm/llvm-project] 85b871: [TTI][X86] Add v8i16 -> 2 x v4i16 stride 2 interle...

[Simon Pilgrim via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 85b87179f4820592894d2d1da699794edf9ad6b6
      https://github.com/llvm/llvm-project/commit/85b87179f4820592894d2d1da699794edf9ad6b6
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2021-10-16 (Sat, 16 Oct 2021)

  Changed paths:
    M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
    M llvm/test/Analysis/CostModel/X86/interleaved-load-i16-stride-2.ll
    M llvm/test/Transforms/LoopVectorize/X86/pr47437.ll

  Log Message:
  -----------
  [TTI][X86] Add v8i16 -> 2 x v4i16 stride 2 interleaved load costs

Split SSE2 and SSSE3 costs to correctly handle PSHUFB lowering - as was noted on D111938