[all-commits] [llvm/llvm-project] 7ae8f3: [AArch64] Emit AssertZExt for i1 arguments
Andrew Savonichev via All-commits
all-commits at lists.llvm.org
Mon Oct 11 01:59:25 PDT 2021
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: 7ae8f392a1610992c9a925c867fd7238c70d3ce0
https://github.com/llvm/llvm-project/commit/7ae8f392a1610992c9a925c867fd7238c70d3ce0
Author: Andrew Savonichev <andrew.savonichev at gmail.com>
Date: 2021-10-11 (Mon, 11 Oct 2021)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator-switch.ll
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-lowering-signext.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-translator.ll
M llvm/test/CodeGen/AArch64/arm64-aapcs.ll
M llvm/test/CodeGen/AArch64/i1-contents.ll
Log Message:
-----------
[AArch64] Emit AssertZExt for i1 arguments
AAPCS requires i1 argument to be zero-extended to 8-bits by the
caller. Emit a new AArch64ISD::ASSERT_ZEXT_BOOL hint (or AssertZExt
for GlobalISel) to enable some optimization opportunities. In
particular, when the argument is forwarded to the callee, we can avoid
zero-extension and use it as-is.
Differential Revision: https://reviews.llvm.org/D107160
More information about the All-commits
mailing list