[all-commits] [llvm/llvm-project] c8b3d7: [AArch64][GlobalISel] Ensure atomic loads always g...

[Jessica Paquette via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: c8b3d7d6d6de37af68b2f379d0e37304f78e115f
      https://github.com/llvm/llvm-project/commit/c8b3d7d6d6de37af68b2f379d0e37304f78e115f
  Author: Jessica Paquette <jpaquette at apple.com>
  Date:   2021-09-15 (Wed, 15 Sep 2021)

  Changed paths:
    M llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
    M llvm/test/CodeGen/AArch64/GlobalISel/arm64-atomic.ll

  Log Message:
  -----------
  [AArch64][GlobalISel] Ensure atomic loads always get assigned GPR destinations

The default register bank selection code for G_LOAD assumes that we ought to
use a FPR when the load is casted to a float/double.

For atomics, this isn't true; we should always use GPRs.

Without this patch, we crash in the following example:

https://godbolt.org/z/MThjas441

Also make the code a little more stylistically consistent while we're here.

Also test some other weird cast combinations as well.

Differential Revision: https://reviews.llvm.org/D109771