[all-commits] [llvm/llvm-project] 20dfe0: [RISCV] Move the $rs operand of PseudoStore from o...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 20dfe051abe021b5be412385406c32bc1a296322
      https://github.com/llvm/llvm-project/commit/20dfe051abe021b5be412385406c32bc1a296322
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2021-08-08 (Sun, 08 Aug 2021)

  Changed paths:
    M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
    M llvm/lib/Target/RISCV/RISCVInstrFormats.td

  Log Message:
  -----------
  [RISCV] Move the $rs operand of PseudoStore from outs to ins. NFC

This is the data to be stored so it should be an input.

To keep operand order similar between loads and stores, move the temp
register to the first dest operand of floating point loads. Rework
the assembler code accordingly.

This doesn't have any functional effect because this Pseudo is only
used by the assembler which doesn't use ins/outs.

Reviewed By: luismarques

Differential Revision: https://reviews.llvm.org/D107309