[all-commits] [llvm/llvm-project] a7a39e: [SVE] Add folds for sign and zero extends of vscale

[DylanFleming-arm via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: a7a39ec886a03cbf70ef187c49370f63514ae931
      https://github.com/llvm/llvm-project/commit/a7a39ec886a03cbf70ef187c49370f63514ae931
  Author: Dylan Fleming <Dylan.Fleming at arm.com>
  Date:   2021-07-30 (Fri, 30 Jul 2021)

  Changed paths:
    M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
    A llvm/test/Transforms/InstCombine/vscale_sext_and_zext.ll

  Log Message:
  -----------
  [SVE] Add folds for sign and zero extends of vscale

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D105994