[all-commits] [llvm/llvm-project] 1c50a5: [PowerPC] Implement partial vector ld/st builtins ...

[Nemanja Ivanovic via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 1c50a5da364fd57905ec170ed9ba64d3c7e416f3
      https://github.com/llvm/llvm-project/commit/1c50a5da364fd57905ec170ed9ba64d3c7e416f3
  Author: Nemanja Ivanovic <nemanja.i.ibm at gmail.com>
  Date:   2021-07-26 (Mon, 26 Jul 2021)

  Changed paths:
    M clang/include/clang/Basic/BuiltinsPPC.def
    M clang/lib/CodeGen/CGBuiltin.cpp
    M clang/lib/Headers/altivec.h
    M clang/lib/Sema/SemaChecking.cpp
    A clang/test/CodeGen/builtins-ppc-ld-st-rmb.c
    M clang/test/CodeGen/builtins-ppc-xlcompat-pwr8.c
    A clang/test/CodeGen/builtins-ppc-xlcompat-vec-error.c

  Log Message:
  -----------
  [PowerPC] Implement partial vector ld/st builtins for XL compatibility

XL provides functions __vec_ldrmb/__vec_strmb for loading/storing a
sequence of 1 to 16 bytes in big endian order, right justified in the
vector register (regardless of target endianness).
This is equivalent to vec_xl_len_r/vec_xst_len_r which are only
available on Power9.

This patch simply uses the Power9 functions when compiled for Power9,
but provides a more general implementation for Power8.

Differential revision: https://reviews.llvm.org/D106757