[all-commits] [llvm/llvm-project] c7f2f8: [AMDGPU] Tidy SReg/SGPR definitions using template...

[Carl Ritson via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: c7f2f81f5e2a1e3b54a2d69e37d7309296a0f4b8
      https://github.com/llvm/llvm-project/commit/c7f2f81f5e2a1e3b54a2d69e37d7309296a0f4b8
  Author: Carl Ritson <carl.ritson at amd.com>
  Date:   2021-07-17 (Sat, 17 Jul 2021)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIRegisterInfo.td
    M llvm/test/CodeGen/AMDGPU/inline-asm.i128.ll

  Log Message:
  -----------
  [AMDGPU] Tidy SReg/SGPR definitions using template class

Use a multiclass to consistently define SReg/SGPR/TTMP register classes.
Add missing TTMP registers for 96b, 160b, 192b, 224b.

Reviewed By: foad

Differential Revision: https://reviews.llvm.org/D105800