[all-commits] [llvm/llvm-project] b889c6: [DAG] Allow isNullOrNullSplat to see truncated zeroes

[David Green via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: b889c6ee9911b72a58986d528f42dd18cbdf92d7
      https://github.com/llvm/llvm-project/commit/b889c6ee9911b72a58986d528f42dd18cbdf92d7
  Author: David Green <david.green at arm.com>
  Date:   2021-06-08 (Tue, 08 Jun 2021)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
    M llvm/test/CodeGen/AArch64/vecreduce-bool.ll
    M llvm/test/CodeGen/RISCV/rvv/vdiv-sdnode-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vdiv-sdnode-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vrem-sdnode-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vrem-sdnode-rv64.ll

  Log Message:
  -----------
  [DAG] Allow isNullOrNullSplat to see truncated zeroes

This sets the AllowTruncation flag on isConstOrConstSplat in
isNullOrNullSplat, allowing it to see truncated constant zeroes on
architectures such as AArch64, where only a i32.i64 are legal. As a
truncation of 0 is always 0, this should always be valid, allowing some
extra folding to happen including some of the cases from D103755.

Differential Revision: https://reviews.llvm.org/D103756