[all-commits] [llvm/llvm-project] 8bde5f: [RISCV] Replace && with ||. Spotted by coverity.
Craig Topper via All-commits
all-commits at lists.llvm.org
Sun Jun 6 13:25:12 PDT 2021
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: 8bde5f06a11d2ed30cc14b4960548d8da7a167b8
https://github.com/llvm/llvm-project/commit/8bde5f06a11d2ed30cc14b4960548d8da7a167b8
Author: Craig Topper <craig.topper at sifive.com>
Date: 2021-06-06 (Sun, 06 Jun 2021)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
Log Message:
-----------
[RISCV] Replace && with ||. Spotted by coverity.
We should be exiting when the shift amount is greater than
the bit width regardless of whether it is a power of 2.
Reported by Simon Pilgrim here https://reviews.llvm.org/D96661
This requires getting a shift amount that is out of bounds that
wasn't already optimized by SelectionDAG. This would be pretty
trick to construct a test for.
Or it would require a non-power of 2 shift amount and a mask
that has runs of ones and zeros of the next lowest power of 2 from
that shift amount. I tried a little to produce a test for this,
but didn't get it to work.
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