[all-commits] [llvm/llvm-project] 86e9bc: [mlir][sparse] add option for 32-bit indices in sc...

[Aart Bik via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 86e9bc1a34a0eafcce52c0dfda0817b1465a0dc2
      https://github.com/llvm/llvm-project/commit/86e9bc1a34a0eafcce52c0dfda0817b1465a0dc2
  Author: Aart Bik <ajcbik at google.com>
  Date:   2021-06-04 (Fri, 04 Jun 2021)

  Changed paths:
    M mlir/include/mlir/Dialect/SparseTensor/Transforms/Passes.h
    M mlir/include/mlir/Dialect/SparseTensor/Transforms/Passes.td
    M mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorPasses.cpp
    M mlir/lib/Dialect/SparseTensor/Transforms/Sparsification.cpp
    M mlir/test/Dialect/SparseTensor/sparse_vector.mlir

  Log Message:
  -----------
  [mlir][sparse] add option for 32-bit indices in scatter/gather

Controlled by a compiler option, if 32-bit indices can be handled
with zero/sign-extention alike (viz. no worries on non-negative
indices), scatter/gather operations can use the more efficient
32-bit SIMD version.

Reviewed By: bixia

Differential Revision: https://reviews.llvm.org/D103632