[all-commits] [llvm/llvm-project] b865ee: [InstCombine] eliminate sext and/or trunc if value...

RotateRight via All-commits all-commits at lists.llvm.org
Thu Jun 3 10:59:53 PDT 2021


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: b865eead76577b031c6fae5e2490e7be0073f201
      https://github.com/llvm/llvm-project/commit/b865eead76577b031c6fae5e2490e7be0073f201
  Author: Sanjay Patel <spatel at rotateright.com>
  Date:   2021-06-03 (Thu, 03 Jun 2021)

  Changed paths:
    M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
    M llvm/test/Transforms/InstCombine/sext-of-trunc-nsw.ll

  Log Message:
  -----------
  [InstCombine] eliminate sext and/or trunc if value has enough signbits

If we have enough signbits in a source value, we can skip an
intermediate cast for a trunc+sext pair:
https://alive2.llvm.org/ce/z/A_mQt-

This is the original problem shown in:
https://llvm.org/PR49543

There's a test that shows we transformed what used to be
a pair of shifts, so that suggests we could add another
ComputeNumSignBits fold starting from a shift.

There does not appear to be any change in compile-time
from the extra analysis:
https://llvm-compile-time-tracker.com/compare.php?from=3d2c9069dcafd0cbb641841aa3dd6e851fb7d760&to=b9513cdf2419704c7bb0c3a02a9ca06aae13d902&stat=instructions

Differential Revision: https://reviews.llvm.org/D103617




More information about the All-commits mailing list