[all-commits] [llvm/llvm-project] 434c8e: [SDAG] try harder to fold casts into vector compare

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  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 434c8e013a2c3f970df8d79f62491c611534bd5c
      https://github.com/llvm/llvm-project/commit/434c8e013a2c3f970df8d79f62491c611534bd5c
  Author: Sanjay Patel <spatel at rotateright.com>
  Date:   2021-05-31 (Mon, 31 May 2021)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    M llvm/test/CodeGen/X86/sext-vsetcc.ll

  Log Message:
  -----------
  [SDAG] try harder to fold casts into vector compare

sext (vsetcc X, Y) --> vsetcc (zext X), (zext Y) --
(when the zexts are free and a bunch of other conditions)

We have a couple of similar folds to this already for vector selects,
but this pattern slips through because it is only a setcc.

The tests are based on the motivating case from:
https://llvm.org/PR50055
...but we need extra logic to get that example, so I've left that as
a TODO for now.

Differential Revision: https://reviews.llvm.org/D103280