[all-commits] [llvm/llvm-project] 53c42f: [ARM] Ensure WLS preheader blocks have branches du...

[David Green via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 53c42f7700e824d6ec394614653abd8b33d5da34
      https://github.com/llvm/llvm-project/commit/53c42f7700e824d6ec394614653abd8b33d5da34
  Author: David Green <david.green at arm.com>
  Date:   2021-05-24 (Mon, 24 May 2021)

  Changed paths:
    M llvm/lib/Target/ARM/ARMISelLowering.cpp
    A llvm/test/CodeGen/Thumb2/mve-memtp-branch.ll
    M llvm/test/CodeGen/Thumb2/mve-memtp-loop.ll

  Log Message:
  -----------
  [ARM] Ensure WLS preheader blocks have branches during memcpy lowering

This makes sure that the blocks created for lowering memcpy to loops end
up with branches, even if they fall through to the successor. Otherwise
IfCvt is getting confused with unanalyzable branches and creating
invalid block layouts.

The extra branches should be removed as the tail predicated loop is
finalized in almost all cases.