[all-commits] [llvm/llvm-project] 72d570: [AMDGPU][AsmParser/Disassembler] Correct A16 and G...

[David Stuttard via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 72d570ca085c809edd70d355cad7129092afbf90
      https://github.com/llvm/llvm-project/commit/72d570ca085c809edd70d355cad7129092afbf90
  Author: David Stuttard <david.stuttard at amd.com>
  Date:   2021-05-14 (Fri, 14 May 2021)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
    M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
    M llvm/lib/Target/AMDGPU/MIMGInstructions.td
    M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
    M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
    M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.a16.dim.ll
    M llvm/test/MC/AMDGPU/gfx10_asm_mimg.s
    A llvm/test/MC/Disassembler/AMDGPU/mimg_gfx10.txt

  Log Message:
  -----------
  [AMDGPU][AsmParser/Disassembler] Correct A16 and G16 handling

A16 support for image instructions assembly/disassembly (gfx10) was missing

Also refactor MIMG op addr size calcs to common function

We'd got 3 places where the same operation was being done.

One test is now marked XFAIL until a related codegen patch is in place

Differential Revision: https://reviews.llvm.org/D102231

Change-Id: I7e86e730ef8c71901457855cba570581f4f576bb