[all-commits] [llvm/llvm-project] a3d273: [GlobalISel] Fix buildZExtInReg creating new regis...

[vangthao95 via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: a3d273c9ff4c789aec0dc743fa2dc846b5987312
      https://github.com/llvm/llvm-project/commit/a3d273c9ff4c789aec0dc743fa2dc846b5987312
  Author: Vang Thao <Vang.Thao at amd.com>
  Date:   2021-05-05 (Wed, 05 May 2021)

  Changed paths:
    M llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp

  Log Message:
  -----------
  [GlobalISel] Fix buildZExtInReg creating new register.

Fix a bug where buildZExtInReg will create and use a new register instead of using the register from parameter DstOp Res.

Reviewed By: arsenm, foad

Differential Revision: https://reviews.llvm.org/D101871