[all-commits] [llvm/llvm-project] 3fbcf0: [RISCV][VP][NFC] Add tests for VP_AND, VP_XOR, VP_OR
Fraser Cormack via All-commits
all-commits at lists.llvm.org
Wed May 5 05:06:13 PDT 2021
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: 3fbcf07a99eccc90b99afcd78d94bf31c01f7329
https://github.com/llvm/llvm-project/commit/3fbcf07a99eccc90b99afcd78d94bf31c01f7329
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2021-05-05 (Wed, 05 May 2021)
Changed paths:
A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vand-vp.ll
A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vor-vp.ll
A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vxor-vp.ll
A llvm/test/CodeGen/RISCV/rvv/vand-vp.ll
A llvm/test/CodeGen/RISCV/rvv/vor-vp.ll
A llvm/test/CodeGen/RISCV/rvv/vxor-vp.ll
Log Message:
-----------
[RISCV][VP][NFC] Add tests for VP_AND, VP_XOR, VP_OR
As agreed in D101826, these are follow-up tests for the RISC-V VP
support.
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