[all-commits] [llvm/llvm-project] bd28d8: [RISCV] Removed getLMULForFixedLengthVector.

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: bd28d8611905f5b19dabf5a52269190b2f7195b4
      https://github.com/llvm/llvm-project/commit/bd28d8611905f5b19dabf5a52269190b2f7195b4
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2021-04-23 (Fri, 23 Apr 2021)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp

  Log Message:
  -----------
  [RISCV] Removed getLMULForFixedLengthVector.

Use getContainerForFixedLengthVector and getRegClassIDForVecVT to
get the register class to use when making a fixed vector type legal.

Inline it into the other two call sites.

I'm looking into using fractional lmul for fixed length vectors
and getLMULForFixedLengthVector returned an integer making it
unable to express this. I considered returning the LMUL
enum, but that seemed like it would introduce more complexity to
convert it for use.