[all-commits] [llvm/llvm-project] fae1d3: [RISCV] Have assembler check that the temp registe...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: fae1d31c09172313f96e16791e823ef4b6badc5d
      https://github.com/llvm/llvm-project/commit/fae1d31c09172313f96e16791e823ef4b6badc5d
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2021-04-23 (Fri, 23 Apr 2021)

  Changed paths:
    M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
    M llvm/test/MC/RISCV/rvv/invalid.s

  Log Message:
  -----------
  [RISCV] Have assembler check that the temp register is different than dest register for vmsgeu.vx pseudo.

Reviewed By: HsiangKai

Differential Revision: https://reviews.llvm.org/D101015


  Commit: 3064a63b2b330a229d0b236472549dc832ce1701
      https://github.com/llvm/llvm-project/commit/3064a63b2b330a229d0b236472549dc832ce1701
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2021-04-23 (Fri, 23 Apr 2021)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
    M llvm/test/CodeGen/RISCV/rvv/vmseq-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vmsge-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vmsgeu-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vmsgt-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vmsgtu-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vmsle-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vmsleu-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vmslt-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vmsltu-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vmsne-rv32.ll

  Log Message:
  -----------
  [RISCV] Remove GetVRegNoV0 from the output register class of masked compare pseudo instructions.

Theses instructions are allowed to write v0 when they are masked.
We'll still never use v0 because of the earlyclobber constraint so
this doesn't really help anything. It just makes the definitions
correct.

While I was there remove an unused multiclass I noticed.

Reviewed By: HsiangKai

Differential Revision: https://reviews.llvm.org/D101118


Compare: https://github.com/llvm/llvm-project/compare/0a5576ecf05f...3064a63b2b33