[all-commits] [llvm/llvm-project] afaf36: [mlir] Handle strided 1D vector transfer ops in Pr...

[Matthias Springer via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: afaf36b69eac614f858631513c27c3af62d99da5
      https://github.com/llvm/llvm-project/commit/afaf36b69eac614f858631513c27c3af62d99da5
  Author: Matthias Springer <springerm at google.com>
  Date:   2021-04-23 (Fri, 23 Apr 2021)

  Changed paths:
    M mlir/lib/Conversion/VectorToSCF/ProgressiveVectorToSCF.cpp
    A mlir/test/Integration/Dialect/Vector/CPU/test-transfer-read-1d.mlir

  Log Message:
  -----------
  [mlir] Handle strided 1D vector transfer ops in ProgressiveVectorToSCF

Strided 1D vector transfer ops are 1D transfers operating on a memref dimension different from the last one. Such transfer ops do not accesses contiguous memory blocks (vectors), but access memory in a strided fashion. In the absence of a mask, strided 1D vector transfer ops can also be lowered using matrix.column.major.* LLVM instructions (in a later commit).

Subsequent commits will extend the pass to handle the remaining missing permutation maps (broadcasts, transposes, etc.).

Differential Revision: https://reviews.llvm.org/D100946