[all-commits] [llvm/llvm-project] 58c5b4: [RISCV] Use TargetConstant for condition code of R...

Craig Topper via All-commits all-commits at lists.llvm.org
Wed Apr 21 23:11:30 PDT 2021


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 58c5b4c2c356a377581440110f1e634fbb49cef6
      https://github.com/llvm/llvm-project/commit/58c5b4c2c356a377581440110f1e634fbb49cef6
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2021-04-21 (Wed, 21 Apr 2021)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/lib/Target/RISCV/RISCVInstrInfo.td

  Log Message:
  -----------
  [RISCV] Use TargetConstant for condition code of RISCVISD::SELECT_CC.

The value is always an immediate and can never be in a register.
This the kind of thing TargetConstant is for.

Saves a step GenDAGISel to convert a Constant to a TargetConstant.




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